CHARACTERIZATION OF HIGH IMPEDANCE OF MULTILAYER COPLANAR WAVEGUIDE TRANSMISSION LINE DESIGN FOR INTEGRATION WITH NANODEVICES

requirements of integration with nanodevice. First approach is a widening the gap of the polyimide dielectric layers used in the fabrication of these components. Several design structures have been considered such as positioning the loca-tion of signal and grounds contacts with respect to the position of the dielectric layers. As the result the highest characteristic impedance of about 90 Ω was achieved at operating frequency of 110 GHz. Secondly, novel coplanar waveguide transmission line structure was investigated where the V – shape structure was joined with the signal elevated structure. The terahertz application research may effect on high data transmission rate of no less than 10 GBit/s and thereby in increase of traffic volume


Introduction
The first lithographically defined GaAs Schottky diodes for the high frequency applications was developed in the middle of 1960s [1]. Consequently, the basic insight of the diode structure was applied by a number of researchers and led to many ground-breaking measurements in the terahertz frequency band. The complexity of circuits is led in the replacement of whiskered diodes with planar diodes functioning even at 2.5 THz [2]. Even though this flip-chip mounted into the circuit diodes are worked at 300 GHz, the reliability and reproducibility problems had not been chosen. Recently, a nanoscale unipolar rectifying diode was proposed [3], so called self-switching diode (SSD) which operates without the use of any doping junction or barrier structure and can be fabricated with a single step lithographic process.
The possibility of nanoscale device fabrication resulted in increase of bearing frequencies to 100 GHz and the data transmission speed. The frequency range of 300 GHz-3 THz is not allocated yet to any concrete application, it can be applied for broadband high speed wireless system of communication. Consequently, terahertz application may effect on transmission of the data with a speed of no less than 10 GBit/s and thereby in increase of traffic volume [4]. The presence of very large number of molecular resonance lines in the band is the reason for the significance of terahertz application [1]. One of the main THz radiation properties is the ability of penetration into various non-conducting materials which are opaque in visible spectrum of the light (fabric, paper, plastic). Moreover, it can penetrate to any organic compounds including in tissue of the person. It can be claimed that the energy of photons at the THz radiation is insignificant, there is no adverse effect as the ionizing x-ray radiation and therefore harmless to the person. Moreover, many chemical and biological substances (explosive, cancer cells) have a unique structure in the THz range on which their identification is possible [5]. As obvious, waves with submillimeter length can be absorbed by water, THz devices can define humidity of a material. Thus, THz radiation allows to implement non-destructive control which is widely applied in military systems, security aids, medicine and health care and manufacturing industry. All this causes continuous increase in demand for THz devices.
The development of the integrated circuit had a great impact on the lifestyle of humanity by broadly applying in the modelling of the nanodevices that could operate at terahertz frequencies [6,7]. Monolithic Microwave Integrated Circuit (MMIC) is the type of simple integrated circuit in which passive and active components are fabricated on the same semiconductor substrate and that process signal frequencies from below 1 Ghz to 300 Ghz [8]. The first MMIC was proposed by Kilby in Texas in 1959 [9]. MMIC is manufactured to integrate active devices such as bipolar or field effect transistors with passive elements to implement functions such as high-frequency switching, microwave mixing, power amplification and low-noise amplification [10]. In order to ease cascading of the MMIC circuit, its output and input devices are matched to a characteristic impedance of 50 Ω. The main integration limitation of self-switching diodes is high level of impedance in megaohms which is a huge value and is not so easy to implement.
Nowadays, the main target for scientists is to design affordable in price, small device and system which generates high-power and consumes low-power by functioning at high frequencies. Even though nanodevice appears to be the solution for the problems regarding the high frequency functioned device, they need monolithic microwave integrated circuits for integration [11].
These mentioned limitations actualize the thorough research in this area and will make possible to achieve success application of terahertz frequency.

Literature review and problem statement
It is evidence that the CPW transmission line is more advantageous than other lines of MMIC in terms of fabrication ease, affordable cost and less-lossy circuit design. The main desirable aim is to use higher-impedance lines for application with nanodevices and nonlinear transmission lines. The application of conventional CPW has very limited range of characteristic devices. The practical size of the slot and the width of the center plane limit the fabrication and high losses result in current crowding effect at the conductor edges [12]. Paper [12] provides the fabrication and simulation results of the CPW transmission line with the characteristic impedance from 10 Ohm to 70 Ohm, by applying the multilayer technique. The research achieved to evaluate the current crowding effect on the conductor edges which minimizes dissipation loss. Even though the results show good performance to meet various circuit requirements, the reached characteristic impedance is insufficient in terms of integration with nanodevice.
The main limitation in frequency response of nanodevice is the mismatched terminals due to the high impedance. It is clearly examined in [13] that the mismatch is due to the dielectric constant and width of the insulation trenches that confine the nanochannel of the device. The capacitive coupling over the insulating trenches has little influence on the device RF properties below 100 Ghz, but significantly affects the device performance around and beyond 1 THz. The proposal reveals the sensitivity of capacitance over the dielectric constant and provides the solution in optimizing the material and lithography parameters of similar nanodevices for THz applications.
Even though there has scrutinized little research to eliminate the mismatch problems, there have been several reports envisaging details of nanodevices. The ballistic rectifiers and nanostructured nonlinear materials were scrutinized both with 4 terminals for microwaved detection up at least 50 Ghz at room temperature [14]. Moreover, up to 1 Ghz was measured by three-terminal junction [15] and the same area was studied with the highest frequency of 20 Ghz [16]. However, these nanodevices have high input resistance in kΩ and cannot be easily integrated.
There are many research works have been scrutinized among the area of highly integrated MMICs in wireless and electronic communication. Reduction in size, low cost are the results of utilizing thin-film technology in realization of miniaturization and high-level integration [17]. The main advantage of MMIC circuits is to avoid gluing, soldering, wire bonding. Hence, existence of surrounding parasitic components ensures better broadband performance and higher operation frequencies. It is advantageous to apply MMIC technology if small size, large quantity and medium power level is needed and is also affordable in price in a large scale.
As the semiconductor for MMIC, Silicon, GaAs and InP are the most utilized substrates which provide large amount of active and passive components. Si integrated circuit was investigated for solid-state radar applications [17]. Signal generation, mixing and harmonic generation functions are performed by hybrid integration circuits [18]. GaAs is one of the most popular due to its higher saturated electron velocity and higher electron mobility than silicon which operate at frequencies higher 250 Ghz. Moreover, it provides better electrical isolation between components and minimizes the transmission losses in the circuit [19]. For the design of suitable compact coplanar waveguide MMIC amplifier, GaAs pHEMT can be utilized as the optimized schematic model [20]. The MMIC GaAs pHEMT with intrinsic and extrinsic parameters has been simulated by taking into account the effect of conductor loss and improved current density calculation and has shown that it would provide a good understanding of the parasitic so often seen in the on-wafer circuit measurements. The CPW transmission line will be designed according to the proposal above, based on GaAS substrates and polyimide as the dielectrics. The performance of the isolation factor parameters, coupling factors and directivity factors can be improved by minimizing the scale dimensions of the dielectric coupler components [21].
One issue associated with CPW is that its signal must be on the middle of two grounds on the same plane, which limits the circuit designing. The potential solution for this problem is to apply multilayer technology in which several layers are utilized by interconnecting insulators [22]. Multilayer technique is usually applied to interconnect terminals so that the parameters of each layer correspond to each other. It is designed by integrating the CPW circuits vertically and allows to reduce the size of its design. The limitations of silicon technologies such as low substrate resistivity, minimum layout feature size and minimum metal density requirements can be solved by multilayer CPW transmission lines. Application of multilayer technology enables the elevation and lifting down the planes between the layers [23].
In order to achieve the low characteristic impedance, coplanar waveguide interconnects for compact MMIC have been scrutinized with different signal conductor widths [24]. It has been proposed that the characteristic impedance as low as 10 Ohm can be achieved for MMIC with the width of 15 µm. This illustrates the large flexibility of the multilayer technology allowing various parameters to be achieved with modifications in the design structure. From the proposal above, it is reasonable to conclude that higher impedance can be reached by reducing the width of the signal strip. As the simulator, ADS Momentum has been chosen in order to achieve accurate characteristics of MMIC components [25].
Considering the limitations in research and desirable results of conventional microwave applications, the project purposes to conduct the research on simulation of a novel techniques of CPW transmission line design.

The aim and objectives of the study
The aim of the study is to design coplanar waveguide transmission line matching circuit by using multilayer technology operated at terahertz frequencies for self-switching nanodevice integration.
To achieve the aim, following objectives were set to implement: to examine and analyse the behaviour of the multilayer CPW transmission line structures with high impedances by changing the parameters of signal plane; to develope novel multilayer CPW transmission line structure in order to achieve higher impedance suitable for integration with nano-SSD devices.

Materials and methods of research
The set of low-loss 3-D CPW transmission lines with characteristic impedance ranging from 10-50 to 70 Ω is examined [12]. The values of characteristic impedances can reach even higher levels by changing the dimensions of the transmission line like the width of the signal strip or the width of the gap in CPW. From Fig. 1-6, various structures of CPW transmission lines with three different levels of characteristic impedance are given to analyze. Fig. 1-6 demonstrate the cross-sectional view of various CPW transmission line structures which provide wide range of characteristic impedances and they do not require special fabrication techniques and can easily be combined with any active device technologies by creating on any substrate. According to the proposal [12], the multilayer CPW transmission line has been fabricated using three layer of metal and two layer of sandwich dielectrics and different layers need to be interconnected properly through the etched windows of the polyimide insulating layer. The specifications of fabricated transmission line are given in Table 1 below.   The measured S-parameters from ADS Momentum Software help to calculate the frequency dependence of transmission-line parameters such as characteristic impedance, effective dielectric constant and dissipation loss.
where Z 0 -characteristic impedance of the transmission line, L -system inductance, C -system conductance, based on the solutions of the classical Telegraph's equation, the characteristic equation can be expressed as: where Z sys =50 Ω is the system impedance, S 11 -the input port voltage reflection coefficient, S 21 -the forward voltage gain. The effective dielectric constant can be calculated using the imaginary part β of propagation constant where the γ=α+jβ where c -speed of light in space, f -frequency, β -phase velocity. The calculation of the dissipation loss for multilayer structures is obtained by using two-port network where the transmitted power to the device is 1-|S 11 | 2 . The output power can be equaled to 2 21 . S The equation of the dissipation loss: Two transmission line structures which have Z 0 =50 Ω are designed with two different techniques. V-shaped structure with multilayer technique has lower dissipation loss and more efficient due to electron flux concentration in the low permittivity polyimide layer and the air, while conventional planar transmission line results in high loss and effective dielectric constant [12]. Two structures with Z 0 >50 Ω are also examined in this paper and provide an overview that the signal elevated structure has 30 % higher impedance and 0.5 dB/cm higher dissipation loss than the structure on the polyimides. Moreover, it has argued that application of more metal layer provides a 4 dB lower dissipation loss. The results of fabricating and characterizing the CPW transmission line on semi-insulating GaAs substrate show the significant improvement of using multilayer technique in comparison with microstrip lines [12]. Fig. 7 below. As noted from Fig. 7, semi-insulating GaAs substrate is the foundation for the CPW multilayer transmission line fabrication. Two polyimide dielectric layers are placed above the GaAs substrate and air on the top. There are three conductor layer "cond", "cond2" and "hole" are shown in graph which are the metal layers. The material of the conductors are chosen Au and thicknesses of each conductor is 0.8 µm.

3-D view of the layers illustrated in
Here also can be noted very thin active layer between the substrates and conductors which is the active layer. The material of the active layer is Ti and its thickness is just 10 nm. It is applied for gluing the GaAs with Au. Two vias "diel" and "diel2" are for interconnection of the layers. The layers must be ordered according to the sequence of layers under the pads presented above.

1. High impedance with narrow signal plane
The structure Z 0 >50 Ω is simulated and examined its high impedance behaviour [18]. Even higher characteristic impedances can be achieved by changing the dimensions of the line such as widening the gap between signal and ground plates or changing the thickness of the polyimide layer.
The first approach of a CPW structure where Z 0 >50 Ω is investigated in this work in order to broadly explore the facilities of the CPW transmission line structures with multilayer technology. The top signal with bottom ground structure of CPW transmission line is chosen from Fig. 4 to simulate.
Initial conductor width of the fabricated CPW transmission line with "top signal with bottom ground" structure is 20 µm. As mentioned above, by reducing the width of the signal strip higher impedance can be achieved. The centre plane is altered such that the transmission line width itself does not change.
There are three quantities of the centre width: 8 µm, 12 µm, 20 µm are compared which are taken based on the fabricated measurements of the signal strip. The raising on size of the gap is implemented by decreasing the width of the signal strip width (W). Fig. 8-10 illustrate the simulation results where three main parameters are extracted from S-parameter.
Simulation results of the coplanar waveguide transmission line structure are shown in Table 2 below.  (Table 2) provide similar behaviour of impedances as the case when the gap raised by decreasing the width of the ground. As expected, by reducing the size of the signal strip the capacitance will also decrease. Graph above provides the proof of that by indicating the higher impedance of about 90.3Ω at W=8 µm.
It is clear that there is a variation between impedances of structures with different widths, which means that the values of L and C change. It can be proven according to the equation for the capacitance of the parallel capacitor and the inductance for a cylindrical coil of cross section area of A are: where ε r is the permittivity of the material between two conductors, ε 0 is the permittivity of free space, d is the distance between two flat conductors, A -cross sectional area of a cylindrical coil, µ 0 is the permeability of free space, µ r is the relative permeability of the core material, N is number of the turns and l is the length of the coil in meters. According to these two formulas of (5), (6), C and L are proportional to ε r and µ r . Moreover, it can be argued that the effective dielectric constant also achieves their peak at 28 Ghz, indicating that C also changes and illustrated in Fig. 9, 14. The Fig. 10 represents the effective dielectric constant of three CPW transmissions where the ε r,eff of structure with W=8 µm noticeably exceeds others. It can be explained by the equation of: where C a is a capacitance of the air assumed as a dielectric material, C -capacitance of the transmission line. Graph from Fig. 9 provides trends of the effective dielectric constants when the width of the signal strip is changed in order to obtain wider gap. Raising signal widths of W=8 µm, W=12 µm and W=20 µm are the values at which the width of the gap decreases at the same time. As proved above, by decreasing the signal width, impedances also decrease. In accordance with this, the ε r,eff must be higher at W=20 µm as shown in Fig. 10 respectively. Nevertheless, achieving the design of the structure with high impedance will have high loss due to the high capacitance. High loss issues would be recommended as a future work to scrutinize it clearly by only focusing on it.
In conclude, it can be argued that higher impedance can be reached by widening the gap between signal and ground planes. As it was shown above about 90 Ω is the highest characteristic impedance. Even though the dissipation loss of these structures has larger value than others, there is small difference between them can be negligible.

2. Novel multilayer coplanar waveguide transmission line for integration with nanodevices
The nanodevice requires the integration with MMIC transmission lines in order to be operated. In process, SSDs need to be integrated to the interdigital fingers which are  connected to inner edges of the ground and signal plates in parallel by creating parallel crossing to each other between these two plates. From here, it can be pointed out that in the structure of CPW there must be the connection between the signal and ground plates. The requirement of integrating the SSD is that the ground must be connected to the active layer which is placed on the top of GaAs substrate. Multilayer technique is applied such that metal conductor and dielectric layers are placed on the top of the active device, where the heat cannot easily be dissipated from the circuit [20,26]. From Fig. 1-6 of CPW transmission line structures [16], V-shaped multilayer structure can be elaborated such that its grounds lower to the surface of GaAs substrate. This is the novel structure given in Fig. 11 that has a connection between signal and ground, also the ground is connected to the active layer. That is the objective of this project to design such transmission line which meets all the requirements of the integration of nanodevice. Fig. 11 represents the cross-sectional view of a novel V-shaped CPW transmission line structure where the ground plane buried in M1 layer. This structure enables the integration of SSDs at its interdigital fingers between the ground and signal strips. By simulating it in ADS Momentum software, characteristic impedance, effective dielectric constant and dissipation loss can be obtained from S-parameter extraction as can be seen in Fig. 12-14 respectively.
In Table 3, the simulation results of the V-shaped novel CPW transmission line where the values of characteristic impedance, effective dielectric constant and dissipation loss are given. Table 3 Simulation results of novel Vshaped coplanar waveguide structure with ground plane buried in M1 with three various signal plane widths  Fig. 12 demonstrates the characteristic impedances of a novel V-shaped CPW line with ground buried in M1 where the width of the signal is varied from 8 µm, 12 µm and 20 µm in order to test its capability to reach higher impedance with lower loss. All the values of the parameter are given in Table 3 above. According to the graph, the characteristic impedance of the red line with smallest width of 8 µm is higher than other trends with wider signal strips and it approximately equals to Z 0 =41.8 Ω. That can be argued that by decreasing the width of the signal strip the higher impedance can be reached. Moreover, as it was noted from the previous graphs, there also peaks appear at resonance frequency, that is the half wavelength where the imaginary parts of impedance cancel each other and equals to zero. In Fig. 13, 14 transmission line parameters such as dissipation losses and effective dielectric constants of that structure are demonstrated. If the ε r, eff of all three lines have approximately same value of 8.05, the line with the width of W=8 µm is less lossy than others.
6. Discussion of the results of the research of coplanar waveguide transmission line and its behavior while changing the parameters CPW transmission line structures fabricated on semi-insulating GaAs substrate with Z 0 >50 Ω were simulated by changing their parameters in order to determine the circuit with the best performance in terms of the efficiency and reliability [18]. Furthermore, as the integration of nanodevice with MMIC transmission lines requires special techniques of interconnecting, the paper considers two approaches. Essence of the first approach is to achieve as higher impedance as possible in order to match with nanoSSD which has the impedance in megaohms. The second approach represents the achievement of the transmission line with 50 Ω characteristic impedance designed such that meets the requirement of interconnecting with array SSDs.
Characterization of CPW transmission line structures using S-parameter is the most effective technique in MMIC. S-parameters are obtained by designing and simulating the structure in ADS Momentum so that intrinsic parameters of the transmission can be evaluated.
From Fig. 8, it can be noted that over the simulated frequency range 0-30 Ghz, the planar structure on two polyimides has shown the highest characteristic impedance of 90.3 Ω (Table 2) by slightly exceeding the impedance of the structure with signal elevated to the top of polyimide. The appearance of very high value of impedances below 1 Ghz in the Fig. 8, 12 can be explained by the existence of dominating effects of series reactance and shunt conductance in transmission line. Here, it can be also noted that approximately at 28 Ghz trends of black and red lines change sharply by creating a peak while the trend of blue line behaves in such a way earlier. This peak is a classical behavior of resonant circuit. As resonance is reached from a low frequency side, the parallel resonant circuit apparent inductance increases. After reaching zero at resonance, it will switch to the negative value just above the resonance, dropping with increasing frequency. According to the formula of (1), where impedance will change same as inductance.
According to the equation (7), the dielectric capacitance decreases with frequency. This will lead to decrease of the total capacitance of the transmission line from low to high frequency. So, ε r, eff also decreases with it. It can be applied for other ε r, eff of the structures. As expected, the effective dielectric constant of the structure with W=8 µm is much lower than others (about 4,64 at 10 Ghz), this is because the polyimide layer has a low dielectric constant of 3.7 as compared with the 12.9 for GaAs. As the value of ε r, eff is much closer to that of the polyimide, it means that most of electron flux happens in polyimide layer rather than GaAs layer. The appearance of very high effective dielectric constants below the value of 2 Ghz illustrated in Fig. 10, 14 can be explained with the limitations of the parameter extraction calculation from S-parameter that gives unreliable data at low frequencies. Despite the several attempts of obtaining transparent simulation results, peak is appeared at the blue line in ε r, eff graph in this simulation which had an impact on the deviation of the dissipation loss and can be explained as the simulation limitations of the extraction procedure using S-parameters.
Comparison of these designed and simulated three structures provides the overview that the transmission line structure with W=8 µm has better performance by providing higher impedance of 90.3 Ω.
There is the drawback of the second approach can be mentioned that by applying this structure, large amount of electron flux will concentrate at the polyimide layers, and it causes on current leakage through the relatively thin polyimide layer and results in increasing of the dissipation loss and current crowding effect. Nevertheless, the CPW transmission line structure with thinner signal strip provides better results in comparison with others by showing higher impedance with less dissipation loss, all other structures have provided approximately same manner of operation and can be chosen to be used for integration with nanodevice. Here, it can be concluded that the second approach of designing CPW transmission line such that it meets the requirements of SSD integration is completed by reaching the system impedance of 41.8 Ω at 30 Ghz frequency.
Furthermore, application of multilayer technique allows eliminating of the current crowding effect. In accordance with these results, these structures will be used in other simulations on the target of designing the circuit with better performance in terms of the impedance and integration with nanodevice.
The main limitation is the unintentional electron flux coupling between CPW transmission lines both horizontally and vertically with other conductor elements embedded in the layout. It results in increasing the dissipation loss and decreasing effective dielectric constant and characteristic impedance. In case of application of the same technique for fabrication of the structure, electron flux will behave in the same manner and needs careful consideration for optimum design integration.
The disadvantage of the study is that the research is limited to scrutinizing the MMIC transmission line itself by considering the integration characteristics of the nanodevices from previously proposed papers.
As concluded, the designed structures do not reach the high level of Z 0 needed for nanodevices. It would be recommended as a future work to address the exploration of the nanodiodes characteristics deeper and scrutinize the integration conditions of the self-switching diodes on the MMICs. Development of nanodevices operated at terahertz frequencies will have great impact on communication area by allowing transmission of the data with the speed of no less than 100 Gbit/s and thereby increase of traffic volume.

Conclusion
1. According to the results of the first approach, it can be argued that widening the gap enables the achievement of high impedance better than other approaches. The highest characteristic impedance achieved in this work is about 90.3 Ω with 3.12 dB/cm dissipation loss at 30 Ghz frequency where the signal plane was reduced by widening the gap.
2. According to the results of the second approach, the novel structure is designed by joining the signal elevated CPW TL structure with V-shaped structure in order to be integrated with nanodevices and gives a lower characteristic impedance of 41.8 Ω with the 2.5 dB/cm dissipation loss at 30 Ghz. Even though these designs are still not reaching the high value of Z 0 needed for the nanodevices, the approaches shown provide useful tools for future optimizations. Drawback of this model is a large amount of electron flux concentrated at the polyimide layers. It significantly effects on current leakage through the relatively thin polyimide layer and results in increasing of the dissipation loss and current crowding effect. Peaks appeared in graphs explain as the limitation of the S-parameter extraction procedure.