Improvement of information technology for synthesizing parallel-stream structures for vertical-group computing of multi-operand neural operations in real time - Tsmots, Ivan; Teslyuk, Vasyl; Opotyak, Yurii; Shtohrinets, Bohdan (Eastern-European Journal of Enterprise Technologies, 2026)
This study considers an approach to improving the information technology of structure synthesis for real-time multi-operand neural operation data processing. The task addressed relates to the lack of a formalized approach to the synthesis of such structures that would simultaneously take into account the parameters of data flows, the depth of the pipeline, the degree of parallelism, and hardware limitations while ensuring the specified time characteristics. Methods for parallel vertical-group calculation of the scalar product, sum of squared differences, and search for maximum and minimum values ​​have been devised. A method for concretizing flow graphs has been improved. Basic parallel-stream computing structures and analytical expressions for estimating hardware costs, pipeline cycle time, and efficiency of hardware resource use have been developed. Based on the above, the information technology for synthesizing parallel-stream structures for vertical-group calculation of real-time multi-operand neural operations has been improved. The task set was solved by combining vertical and group parallelism, conveyorization, modular organization, matching the intensity of data input with the intensity of their processing and a gradual transition from algorithmic description to hardware implementation. The improved information technology provides a reduction in hardware costs, increased throughput, reduced latency, and the selection of optimal parameters of structures. Simultaneous processing of groups of bit slices reduces the number of pipeline steps, and the specification of flow graphs makes it possible to adapt the structure of calculations to real-time requirements. In practice, the results could be used for synthesizing specialized FPGA-, ASIC-, SoC-tools for neural-oriented real-time systems with specified characteristics