IMPLEMENTATION OF A FILTER WITH POST-FILTERING DECISION-MAKING ON MICROPROCESSOR ARCHITECTURES WITH VECTOR EXTENSION TO ENSURE PERFORMANCE INDICATORS OF FORENSIC EXAMINATION
DOI:
https://doi.org/10.24025/2306-4412.4.2020.223572Keywords:
automation of image processing process, image filtering, post-filtering decisionmaking, sorting networks, image filter modelling.Abstract
The study results of the means of maintenance of efficiency indicators of image forensic examination, including digital images, are shown. The analysis of the main tasks faced by image examination and methods of their solution is carried out. The main problem of such studies consists in insufficient automation of image processing process during the examination. The object of the study is the process of image filtering, the subject of the study is filters that are used in image processing. As a result of the analysis of implementations of noise detectors it is established that they are computationally complex. And the hardware costs of implementing the algorithm on modern microprocessors and programmable integrated circuits can significantly limit the use of such algorithms in applications that require real-time processing. The purpose of the article is to build a high-speed implementation of the filter with postfiltering decision-making on modern processor architectures. The results of the analysis of the possibility of using vector instructions of modern processor architectures are presented, sorting vectorization algorithms for effective implementation of the search subroutine for the median value within the current one are considered, and the filter with post-filtering decision-making to determine suitability for real-time tasks is modelled. As a result of the conducted studies the method of vectorized implementations of the filter with post-filtering decision-making suitable for processors with a set of SIMD ARM NEON, Intel SSE or AVX commands is proposed for the first time; the use of sorting networks as a median search algorithm for processors with vector extension is considered; for the first time the implementation of the filter by the described method for the ARM Cortex-A9 processor as a part of Intel SOC Cyclone® V SE 5CSEBA6U23I7NDK is constructed; the filter operation is modelled on ARM Cortex-A9. The processing speed of the 512x512 pixel image has been more than 500 frames per second. The FullHD halftone image processing speed has been more than 60 frames.
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Copyright (c) 2020 Олег Георгійович Васильченков, Наталія Олександрівна Євсіна, Дмитро Валентинович Сальніков, Павло Володимирович Буслов The authors who publish in this journal agree to the following terms:The authors reserve the right to authorship of their work and give the journal the right to first publish this work under the terms of the Creative Commons Attribution License CC BY-NC, which allows other persons to freely distribute published work with a mandatory reference to authors of the original work and the first publication of the work in this journal.
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