Automated design of embedded digital signal processing systems on SOC platform
DOI:
https://doi.org/10.30837/ITSSI.2024.27.192Keywords:
embedded systems; systems-on-chip; FPGA; C programming language; digital signal processing algorithms; audio signals; digital filters.Abstract
The object of the study is the procedures for automated design and analysis of digital signal processing algorithms on the SoC technology platform. The subject of the study is models, methods and procedures for designing and optimal selection of SoC components for the implementation of digital signal processing algorithms for audio spectrum. The aim of the study is to develop models and procedures for determining the possibilities of a compromise distribution of signal processing algorithm computations in the cycle of computer-aided design on the SoC technology platform in terms of performance and the feasibility of using hardware and software algorithms realization. The article solves the following tasks: consideration of the procedures for interacting the processor core with programmable logic as part of system-on-chip systems; development of procedures for computer-aided design and analysis of signal processing systems using programming languages and hardware description languages for the implementation of embedded systems. The following methods are being used: implementation of digital signal processing algorithms in the C programming language and high-level synthesis tools for realizing IP blocks, diagnostic experiment by generating test signal patterns, and analysis of the processing results at the system output. The results achieved. Based on the analysis of the procedures for the interaction of the processor core and programmable logic on the selected SoC platform, a model of the audio spectrum signal processing system is designed. The practical implementation was performed based on the Vivado/Vitis/Vitis HLS CAD tool stack. The proposed model was verified using a programmable test signal generator and analyzing the obtained characteristics of digital filters at the system output. Conclusions. The article analyzes the principles of designing embedded information processing systems implemented in system-on-chip. The principles of building and analyzing digital signal processing systems based on system-on-chip containing programmable logic and processor parts are considered. The developed methods have been tested on the algorithms of CIC and FIR filters on the technological platform of SoC FPGA of the ZYNQ-7000 family of Xilinx company.
References
Список літератури
Lee E. A., Seshia S. A. Introduction to embedded systems: A cyber-physical system approach. MIT Press, 2017. 564 p. URL: https://ptolemy.berkeley.edu/books/leeseshia/releases/LeeSeshia_DigitalV2_2.pdf (дата звернення: 04.02.2024).
Popoff M., Michon R., Risset T., Orlarey Y., Letz S. Towards an FPGA-based compilation flow for ultra-low latency audio signal processing. Proceedings of the 19th Sound and Music Computing (SMC-22), June 5–12, Saint-Étienne, France. 2022. P. 555–562. DOI:10.1109/ASAP57973.2023.00018
Wassi G., Iloga S., Romain O., Granado B., Tchuenté M. FPGA-based simultaneous multichannel audio processor for musical genre indexing applications in broadcast band. Journal of parallel and distributed computing. 2018. Vol. 119. P. 146–161. DOI: 10.1016/j.jpdc.2018.02.011
Wang T., Bohanan S. Active noise cancellation with FPGA – practical considerations. INTER-NOISE and NOISE-CON congress and conference proceedings (NOISE-CON23). May 15–18, Grand Rapids, USA. 2023. Vol. 266, no. 1. P. 1036–1043. DOI: 10.3397/NC_2023_0124
Cannon D., Fang T., Saniie J. Modular Delay Audio Effect System on FPGA. IEEE International Conference on Electro Information Technology (eIT). May 19–21, Mankato, USA. 2022. P. 248–251. DOI: 10.1109/eIT53891.2022.9813875
Xie W., Yang F. Design and implementation of audio stream processing based on ZYNQ. IEEE 6th information technology and mechatronics engineering conference (ITOEC), March 4-6, Chongqing, China. 2022. P. 589–592. DOI: 10.1109/ITOEC53115.2022.9734347
Popoff M., Michon R., Risset T., Cochard P., Letz S., Orlarey Y., Dinechim de F. Audio DSP to FPGA Compilation: The Syfala Toolchain Approach. Research report №9507. Grame, Emeraude: Inria. 2023. 18 p. URL: https://hal-lara.archives-ouvertes.fr/hal-04099135/ (дата звернення: 04.02.2024).
Kortli Y., Gabsi S., Jridi M., Alfalou A., Atri M. Hw/Sw Co-Design technique for 2D fast fourier transform algorithm on Zynq SoC. Integration. 2021. Vol. 82. P. 78–88. DOI: 10.1016/j.vlsi.2021.09.005
Azzaz M., Maali A., Kaibou R., Kakouche I., Mohamed S., Hamil H. FPGA HW/SW codesign approach for real-time image processing using HLS. 1st International Conference on Communications, Control Systems and Signal Processing (CCSSP’20), May 16–17, EL OUED, Algeria. 2020. P. 169–174. DOI: 10.1109/CCSSP49278.2020.9151686
Dragoi C., Anghel C, Stanciu C., Paleologu C. Efficient FPGA Implementation of Classic Audio Effects. 13th International Conference on Electronics, Computers and Artificial Intelligence (ECAI’21), July 1-3, Pitesti, Romania. 2021. P. 1–6. DOI: 10.1109/ECAI52376.2021.9515041
Esen Y., San İ. Low-latency SoC design with high-level accelerators specific to sound effects. International Journal of Advances in Engineering and Pure Sciences. 2021. Vol. 33. P. 78–87. DOI: 10.7240/jeps.897556
Zhang Y., Wang C., Lei G., Lu Y., Sun F., Xu C., Li X., Zhou X. An FPGA-based accelerated optimization algorithm for real-time applications. Journal of Signal Processing Systems. 2020. Vol. 92, No. 10. P. 1155–1176. DOI: 10.1109/ISPA/IUCC.2017.00098
Ustun E., San I., Yin J., Yu C., Zhang Z. IMpress: large integer multiplication expression rewriting for FPGA HLS. 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’22), May 15–18, New York City, USA. 2022. P.1–10. DOI: 10.1109/FCCM53951.2022.9786123
Havinga T., Jiao X., Liu W., Moerman I. Accelerating FPGA-based WI-FI transceiver design and prototyping by high-level synthesis. 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’23), May 8–11, Marina Del Rey, USA. 2023. P. 1–7. DOI: 10.1109/FCCM57271.2023.00047
Deulkar A. S., Kolhare N. R. FPGA implementation of audio and video processing based on Zedboard. International Conference on Smart Innovations in Design, Environment, Management, Planning and Computing (ICSIDEMPC’20), October 30–31, Aurangabad, India. 2020. Vol. 6. P. 143580–143591. DOI: 10.1109/ACCESS.2021.3120470
Shkil A., Rakhlis D., Filippenko I., Korniienko V. Design and self-diagnostics of cyberphysical control devices on SOC platform. Innovative technologies and scientific solutions for industries.Vol. 4(26). P. 122–134. DOI: 10.30837/ITSSI.2023.26.122
Neon. Arm Developer. URL: https://developer.arm.com/Architectures/Neon (дата звернення: 29.01.2024).
Signal processing stack exchange. URL: https://dsp.stackexchange.com/questions/66451/fir-filtering-operation-also-convolution (дата звернення: 04.02.2024).
Convolution theory. URL: https://personal.utdallas.edu/~raja1/EE%203302%20Fall%2016/GaTech/cconvdemo/help/theory.html#:~:text=Convolution%20is%20an%20operation%20by,and%20output%20y(t) (дата звернення: 04.02.2024).
Lineartime-invariant systems and convolution. URL: https://redwood.berkeley.edu/wpcontent/uploads/2018/08/lti_convolution.pdf (дата звернення: 04.02.2024).
Smith S. W. The scientist and engineer's guide to digital signal processing. 2nd ed. San Diego, Calif: California Technical Pub., 1999. 650 p. URL: https://ia801301.us.archive.org/23/items/GuideToDigitalSignalProcessing/Guide%20To%20Digital%20Signal%20Processing.pdf
Fingeroff M. High-Level Synthesis Blue Book. Bloomington: Xlibris Corporation, 2010. 286 p. URL: https://www.cse.usf.edu/~haozheng/teach/cda4253/doc/hls/hls_bluebook_uv.pdf (дата звернення: 04.02.2024).
Feedforward Comb Filters. URL: https://www.dsprelated.com/freebooks/pasp/Feedforward_Comb_Filters.html (дата звернення: 04.02.2024).
References
Lee, E. A., Seshia, S. A. (2017), "Introduction to embedded systems: A cyber-physical system approach, MIT Press", 564 p. available at: https://ptolemy.berkeley.edu/books/leeseshia/releases/LeeSeshia_DigitalV2_2.pdf (last accessed: 04.02.2024).
Popoff, M., Michon, R., Risset, T., Orlarey, Y., Letz, S. (2022), "Towards an FPGA-based compilation flow for ultra-low latency audio signal processing". Proceedings of the 19th Sound and Music Computing (SMC-22), June 5–12, Saint-Étienne, France, P. 555–562. DOI: 10.1109/ASAP57973.2023.00018
Wassi, G., Iloga, S., Romain, O., Granado, B., Tchuenté, M. (2018), "FPGA-based simultaneous multichannel audio processor for musical genre indexing applications in broadcast band", Journal of parallel and distributed computing, Vol. 119, P. 146–161. DOI: 10.1016/j.jpdc.2018.02.011
Wang, T., Bohanan, S. (2023), "Active noise cancellation with FPGA – practical considerations", INTER-NOISE and NOISE-CON congress and conference proceedings (NOISE-CON23), May 15–18, Grand Rapids, USA, Vol. 266, no. 1, P. 1036–1043. URL: DOI: 10.3397/NC_2023_0124
Cannon, D., Fang, T., Saniie, J. (2022), "Modular Delay Audio Effect System on FPGA", IEEE International Conference on Electro Information Technology (eIT), May 19–21, Mankato, USA, P. 248–251. DOI: 10.1109/eIT53891.2022.9813875
Xie, W., Yang, F. (2022), "Design and implementation of audio stream processing based on ZYNQ", IEEE 6th information technology and mechatronics engineering conference (ITOEC), March 4–6, Chongqing, China, P. 589–592. DOI: 10.1109/ITOEC53115.2022.9734347
Popoff, M., Michon, R., Risset, T., Cochard, P., Letz, S., Orlarey, Y., Dinechim, de F. (2023), "Audio DSP to FPGA Compilation: The Syfala Toolchain Approach", Research report №9507, Grame, Emeraude: Inria,18 p. available at: https://hal-lara.archives-ouvertes.fr/hal-04099135/ (last accessed: 04.02.2024).
Kortli Y., Gabsi S., Jridi M., Alfalou A., Atri M. (2021), "Hw/Sw Co-Design technique for 2D fast fourier transform algorithm on Zynq SoC", Integration, Vol. 82, P. 78–88. DOI: 10.1016/j.vlsi.2021.09.005
Azzaz, M., Maali, A., Kaibou, R., Kakouche, I., Mohamed S., Hamil H. (2020), "FPGA HW/SW codesign approach for real-time image processing using HLS", 1st International Conference on Communications, Control Systems and Signal Processing (CCSSP’20), May 16–17, EL OUED, Algeria, P. 169–174. DOI: 10.1109/CCSSP49278.2020.9151686
Dragoi, C., Anghel, C, Stanciu, C., Paleologu, C. (2021), "Efficient FPGA Implementation of Classic Audio Effects", 13th International Conference on Electronics, Computers and Artificial Intelligence (ECAI’21), July 1–3, Pitesti, Romania, P. 1–6. DOI: 10.1109/ECAI52376.2021.9515041
Esen, Y., San, İ. (2021), "Low-latency SoC design with high-level accelerators specific to sound effects", International Journal of Advances in Engineering and Pure Sciences, Vol. 33, P. 78–87. DOI: 10.7240/jeps.897556
Zhang, Y., Wang, C., Lei, G., Lu, Y., Sun, F., Xu, C., Li, X., Zhou, X. (2020). "An FPGA-based accelerated optimization algorithm for real-time applications", Journal of Signal Processing Systems, Vol. 92, no. 10, P. 1155–1176. DOI: 10.1109/ISPA/IUCC.2017.00098
Ustun, E., San, I., Yin, J., Yu, C., Zhang, Z. (2022), "IMpress: large integer multiplication expression rewriting for FPGA HLS", 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’22), May 15–18, New York City, USA, P. 1–10. DOI: 10.1109/FCCM53951.2022.9786123
Havinga, T., Jiao, X., Liu, W., Moerman, I. (2023), "Accelerating FPGA-based WI-FI transceiver design and prototyping by high-level synthesis", 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’23), May 8–11, Marina Del Rey, USA, P. 1–7. DOI: 10.1109/FCCM57271.2023.00047
Deulkar, A. S., Kolhare, N. R. (2020), "FPGA implementation of audio and video processing based on Zedboard", International Conference on Smart Innovations in Design, Environment, Management, Planning and Computing (ICSIDEMPC’20), October 30–31, Aurangabad, India, Vol. 6, P. 143580–143591. DOI: 10.1109/ACCESS.2021.3120470
Shkil, A., Rakhlis, D., Filippenko, I., Korniienko, V. (2023), "Design and self-diagnostics of cyberphysical control devices on SOC platform", Innovative technologies and scientific solutions for industries, Vol. 4(26), P. 122–134. DOI: 10.30837/ITSSI.2023.26.122
"Neon", Arm Developer, available at: https://developer.arm.com/Architectures/Neon (last accessed: 29.01.2024).
"Signal Processing Stack Exchange", available at: https://dsp.stackexchange.com/questions/66451/fir-filtering-operation-also-convolution (last accessed: 04.02.2024).
"Convolution Theory", available at: https://personal.utdallas.edu/~raja1/EE%203302%20Fall%2016/GaTech/cconvdemo/help/theory.html#:~:text=Convolution%20is%20an%20operation%20by,and%20output%20y(t) (last accessed: 04.02.2024).
"Linear time-invariant systems and convolution", available at: https://redwood.berkeley.edu/wp-content/uploads/2018/08/lti_convolution.pdf (last accessed: 04.02.2024).
Smith, S. W. (1999), "The scientist and engineer's guide to digital signal processing", 2nd ed., San Diego, Calif: California Tech. Pub., 650 p. available at: https://ia801301.us.archive.org/23/items/GuideToDigitalSignalProcessing/Guide%20To%20Digital%20Signal%20Processing.pdf (last accessed: 04.02.2024).
Fingeroff, M. (2010), "High-Level Synthesis Blue Book", Bloomington: Xlibris Corporation, 286 p. available at: https://www.cse.usf.edu/~haozheng/teach/cda4253/doc/hls/hls_bluebook_uv.pdf (last accessed: 04.02.2024).
"Feedforward Comb Filters", available at: https://www.dsprelated.com/freebooks/pasp/Feedforward_Comb_Filters.html (last accessed: 04.02.2024).
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