Development of hardware-software model for signal spectrum computation using Fast Fourier Transform based on FPGA

Authors

DOI:

https://doi.org/10.15587/2706-5448.2025.336992

Keywords:

model, Fast Fourier Transform, Field-Programmable Gate Array, Python, magnitude, rounding, accuracy, telecommunications

Abstract

The object of research is the implementation methods of an adaptive hardware-software model for signal spectrum analysis using Fast Fourier Transform (FFT), implemented on a Field-Programmable Gate Array (FPGA) followed by processing in the software part. This solution combines the advantages of hardware acceleration and software flexibility. The proposed model is aimed at solving the problem of creating an efficient tool for real-time signal processing, taking into account limitations in accuracy, latency, resource usage, and data retention for further processing and analysis. The model is designed with scalability in mind, both in terms of increasing the number of processing channels and extending the FFT length and precision level. Its development included stages of modeling, synthesis, debugging, and testing close to real-world conditions. The structure of the model was thoroughly designed, data representation formats and rounding procedures were optimized, and the FFT algorithm was adapted to the specifics of the chosen platform. Altogether, this ensured high accuracy of spectral analysis and efficient use of FPGA resources, as confirmed by experimental data. Practical testing of the system in real time was conducted, during which such parameters as result accuracy and power consumption were evaluated, considering the efficient use of logic elements and memory blocks. The obtained results logically reflect the advantages of the hardware-software implementation, the usage of optimized data formats and rounding procedures, as well as the successful adaptation of the FFT algorithm. This allowed achieving a balance between high spectral analysis accuracy at the level of 3.97 kHz with an FFT length of 16,384, a twofold reduction in the required memory size, and a 0.25 ms decrease in FFT result transmission time. The practical applications of the developed model cover a wide range of fields, including embedded signal processing systems, modern real-time measurement devices, as well as mobile or energy-efficient systems, where real-time processing under low power consumption is critical. Thanks to its versatility, the model can be integrated into more complex digital signal processing systems, expanding their functionality.

Author Biographies

Oleksandr Vasyliev, Kharkiv National University of Radio Electronics

PhD Student

Department of Design Automation

Oleh Filippenko, Kharkiv National University of Radio Electronics

PhD, Associate Professor

Department of Infocommunication Engineering V. V. Popovsky

Inna Filippenko, Kharkiv National University of Radio Electronics

PhD, Associate Professor

Department of Design Automation

Oleksandr Shkil, Kharkiv National University of Radio Electronics

PhD, Associate Professor

Department of Design Automation

References

  1. Kaya, Z., Garrido, M., Takala, J. (2023). Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. IEEE Transactions on Circuits and Systems II: Express Briefs, 70 (8), 3084–3088. https://doi.org/10.1109/tcsii.2023.3245823
  2. Kaya, Z., Garrido, M. (2023). Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G. IEEE Transactions on Circuits and Systems I: Regular Papers, 70 (10), 4004–4014. https://doi.org/10.1109/tcsi.2023.3298227
  3. Yang, C., Wu, J., Xiang, S., Liang, L., Geng, L. (2023). A High-Throughput and Flexible Architecture Based on a Reconfigurable Mixed-Radix FFT With Twiddle Factor Compression and Conflict-Free Access. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 31 (10), 1472–1485. https://doi.org/10.1109/tvlsi.2023.3298943
  4. García-Astudillo, L. A., Lindoso, A., Entrena, L., Martín, H., García-Valderas, M. (2021). Error sensitivity study of FFT architectures implemented in FPGA. Microelectronics Reliability, 126, 114298. https://doi.org/10.1016/j.microrel.2021.114298
  5. Xie, Y., Chen, H., Zhuang, Y., Xie, Y. (2023). Fault Classification and Diagnosis Approach Using FFT-CNN for FPGA-Based CORDIC Processor. Electronics, 13 (1), 72. https://doi.org/10.3390/electronics13010072
  6. Changela, A., Zaveri, M., Verma, D. (2020). FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm. Integration, 73, 89–100. https://doi.org/10.1016/j.vlsi.2020.03.008
  7. Dang, T.-H., Tran, V.-N., Nguyen, L.-C. (2023). A parallel rotator for FFT/IFFT applied in multi-carrier wireless communication systems. Digital Signal Processing, 141, 104190. https://doi.org/10.1016/j.dsp.2023.104190
  8. He, J., Bao, Z., Li, H., Li, Q., Li, Z., Liu, P. et al. (2023). Implementation of an Adaptive Trapezoidal Shaping Method Based on FFT. IEEE Transactions on Nuclear Science, 70 (9), 2234–2239. https://doi.org/10.1109/tns.2023.3307475
  9. Song, J., Li, Y., Qiu, J., Hong, X., Guo, H., Yang, Z. et al. (2023). Low-Complexity FPGA Implementation of 106.24Gbps DP-QPSK Coherent Optical Receiver With Fractional Oversampling Rate Based on One FIR Filter for Resampling, Retiming and Equalizing. Journal of Lightwave Technology, 41 (16), 5244–5251. https://doi.org/10.1109/jlt.2023.3258072
  10. Yao, Y., Zhang, J., Liu, Y., Ruan, T., Li, W., Lian, H. et al. (2023). Development of a multifunctional real-time data processing system for interferometers on EAST. Journal of Instrumentation, 18 (11), C11013. https://doi.org/10.1088/1748-0221/18/11/c11013
  11. Li, C. J., Li, X., Lou, B., Jin, C. T., Boland, D., Leong, P. H. W. (2023). Fixed-point FPGA Implementation of the FFT Accumulation Method for Real-time Cyclostationary Analysis. ACM Transactions on Reconfigurable Technology and Systems, 16 (3), 1–28. https://doi.org/10.1145/3567429
  12. Reduced Gigabit Media Independent Interface (RGMII) (2020). Texas Instruments Incorporated. Available at: https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/6661.RGMIIv1_5F00_3.pdf
Development of hardware-software model for signal spectrum computation using Fast Fourier Transform based on FPGA

Downloads

Published

2025-08-29

How to Cite

Vasyliev, O., Filippenko, O., Filippenko, I., & Shkil, O. (2025). Development of hardware-software model for signal spectrum computation using Fast Fourier Transform based on FPGA. Technology Audit and Production Reserves, 4(2(84), 99–107. https://doi.org/10.15587/2706-5448.2025.336992

Issue

Vol. 4 No. 2(84) (2025): Information and control systems

Section

Systems and Control Processes

License

Copyright (c) 2025 Oleksandr Vasyliev, Oleh Filippenko, Inna Filippenko, Oleksandr Shkil

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

The consolidation and conditions for the transfer of copyright (identification of authorship) is carried out in the License Agreement. In particular, the authors reserve the right to the authorship of their manuscript and transfer the first publication of this work to the journal under the terms of the Creative Commons CC BY license. At the same time, they have the right to conclude on their own additional agreements concerning the non-exclusive distribution of the work in the form in which it was published by this journal, but provided that the link to the first publication of the article in this journal is preserved.