Features of formation of microwave GaAs structures on homo and hetero-transitions for the sub-microconnection of the lsic structures
DOI:
https://doi.org/10.15587/1729-4061.2019.157212Keywords:
complementary structures, low-temperature epitaxy, integrated circuits, buffer layer, magnetron depositionAbstract
The features of the formation of microwave GaAs structures are considered and a set of studies is carried out to create a serial technology of large-scale integrated circuit structures (LSIC), including the number of microwaves on GaAs epitaxial layers deposited on monosilicon substrates.
The conditions for the formation of a two-dimensional electron gas in hetero-structures with the determination of electron mobility depending on the orientation of the surface were investigated. For hetero-structures on the surface of a semi-insulated GaAs substrate rotated from the plane (100) at an angle of 6–10º with oxygen content on the initial surface С0=10–50 % relative to the gallium peak of the Auger spectrum, a strong mobility anisotropy was found due to an increase in the angle of reorientation and incomplete annealing of carbon from the initial surface of the GaAs substrate.
For the deposited layers of gallium arsenide on monosilicon substrates epitaxial technology is used, which can significantly improve the purity of the obtained material, namely, significantly reduce the level of oxygen and carbon isoconcentration impurities, which strongly affect the charge state of the interface.
For the formation of structural layers on GaAs, the technology for the formation of nitride layers of Si3N4, AlN, BN by the magnetron method at low substrate temperatures and a given stoichiometry was developed and investigated. The combination of gallium epitaxial nano-silicon arsenide technology to silicon substrates became realistically possible only with the development of technology of magnetron precipitated buffer layers of germanium.
The technology of the formation of logical elements NOT, OR-NOT, AND-NOT of high speed with low threshold voltage is developed, which allows to build high-speed chips of combination and sequential types on complementary structuresReferences
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Copyright (c) 2019 Stepan Novosiadlyi, Volodymyr Gryga, Bogdan Dzundza, Sviatoslav Novosiadlyi, Volodymyr Mandzyuk, Halyna Klym, Omelian Poplavskyi
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