Development of the reconfiguration acceleration method in the dynamically reconfigurable computing systems

Authors

  • Юрій Олексійович Кулаков National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056, Ukraine https://orcid.org/0000-0002-8981-5649
  • Ірина Анатоліївна Клименко National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056, Ukraine https://orcid.org/0000-0001-5345-8806
  • Мирослав Валентинович Рудницький National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056, Ukraine https://orcid.org/0000-0002-6166-1078

DOI:

https://doi.org/10.15587/1729-4061.2015.47227

Keywords:

reconfigurable computing systems, partial dynamic reconfiguration, reconfiguration overhead, accelerated reconfiguration

Abstract

The problem of performance improvement of reconfigurable computing systems, including solving the problem of reconfiguration overhead reduction was considered. A new reconfiguration acceleration method and hardware for its implementation, which allow to minimize the reconfiguration time overhead were proposed. Analytical expressions that formalize the reconfiguration acceleration method, justify the virtually complete removal of unproductive reconfiguration time by reducing the communication component of time that provides an intensive reconfiguration acceleration were obtained. The formalization shows that the volume of the removed unproductive time component is linearly dependent on the number of repetitive tasks. Thus, using the proposed method is the most efficient in the algorithms that contain a large number of similar tasks.

The proposed hardware for schedule management of placement and support of configurations of functional units, based on the multi-level memory, provide effective support of the reconfiguration overhead reduction method and allow to reduce computational complexity of reconfiguration control algorithms and solve the problem of limited resources of internal memory of the FPGA. The designed emulator of the reconfigurable computing system and software model of the reconfiguration acceleration method enable the real-time control simulation of reconfigurable resources. The developed software is a handy tool to study the temporal characteristics of the reconfigurable computing system.

Simulation of the reconfiguration acceleration method for computing algorithms with the multilevel structure, which is experimentally confirmed by theoretical research was performed.

Author Biographies

Юрій Олексійович Кулаков, National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056

Professor, Doctor of technical sciences, Professor of the department

The department of computer engineering

Ірина Анатоліївна Клименко, National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056

Associate professor, PhD, Doctoral candidate

The department of computer engineering

Мирослав Валентинович Рудницький, National Technical University of Ukraine "Kyiv Polytechnic Institute", 37, Prospect Peremohy, Kyiv, Ukraine, 03056

The department of computer engineering

References

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Published

2015-08-27

How to Cite

Кулаков, Ю. О., Клименко, І. А., & Рудницький, М. В. (2015). Development of the reconfiguration acceleration method in the dynamically reconfigurable computing systems. Eastern-European Journal of Enterprise Technologies, 4(4(76), 25–30. https://doi.org/10.15587/1729-4061.2015.47227

Issue

Section

Mathematics and Cybernetics - applied aspects